Modular Exponentiation Core [CVS]
This core is a basic implementation of the high-radix montgomery multiplication with parallelized square-multiply. It utilizes the Virtex-4 DSP48 slices and BlockRAM for performing the computations and requires no setup step (residue and p-setup is done in the core). The core performs everything in 16-bit operations so it requires the following for a 1024-bit operation:
n = number of bits (1024)
w = number of bits in a word (16)
e = number of words (n / w) (64)
Operation
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Complexity
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Clock Cycles
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Speed
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Total Time
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Residue Calculation
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rc = n * e
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rc = (1024) * (64) = 65536
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150MHz
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437us
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P-Setup Calculation
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ps = (log2(w) + 3) * 2
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ps = (log2(16) + 3) * 2 = 14
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200MHz
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70ns (done in parallel with Residue Calculation)
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Montgomery Multiplication
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mm = e2
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mm = (64)2 = 4096
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200MHz
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20us
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Montgomery Exponentiation
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moe = n * mm
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moe = (1024) * (4096) = 4194304
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200MHz
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20.97ms
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Modular Exponentiation
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me = moe + MAX(rc, ps)
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me = (4194304) + MAX(14, 65536 * (200 / 150)) = 4281685
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200MHz
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21.41ms
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